`timescale  1ns/1ns
module bg_out_adj(    
    input   wire             resetb,
    input   wire             BL_clk,
  
    input   wire             I_we, 
    input   wire   [12:0]    I_waddr, 
    input   wire   [15:0]    I_wdata,
    input   wire             I_we_end,
    input   wire             vs,


    output  wire             O_we,          // /* synthesis syn_keep = 1 */, 
    output  wire   [12:0]    O_waddr, 
    output  wire   [15:0]    O_wdata,       // /* synthesis syn_keep = 1 */,
    output  wire             O_we_end,

    output  reg    [4:0]     O_test_dect,


    input   wire             set_clk,
    input   wire             set_d_ok,
    input   wire   [23:0]    set_addr,
    input   wire   [7:0]     set_data
    
    );
//******************************//
//       参数寄存器            //
//******************************//
reg  [7:0]      light_r;
reg  [7:0]      light_g;
reg  [7:0]      light_b;
reg  [7:0]      light_l5;
reg  [7:0]      light_l6;
reg  [7:0]      light_l7;
reg  [7:0]      light_l8;
reg  [7:0]      dataout_sel;

reg  [7:0]  zc_mode;
reg  [7:0]  sr_select;
reg  [7:0]  bg_select;
reg  [7:0]  tg_select;
reg  [7:0]  mode5_select;
reg  [5:0]  l_zone1;
reg  [5:0]  h_zone1;
reg  [5:0]  l_zone2;
reg  [5:0]  h_zone2;
reg  [7:0]  display_s;
reg  [7:0]  light_zone1;
reg  [7:0]  light_zone2;
reg  [7:0]  light_zone3;
reg  [7:0]  light_zone4;


reg  [7:0]  light_l1;
reg  [7:0]  light_l2;
reg  [7:0]  light_l3;
reg  [7:0]  light_l4;
reg  [7:0]  datain_sel;
reg  [7:0]  light_adj_h;
reg  [7:0]  light_adj_l;


reg  [15:0]   wdata_t1;
reg  [12:0]    waddr_t1;
reg           we_t1;
reg           we_end_t1;

//parameter  L_WIDE = 30;
//parameter  H_WIDE = 40;
//parameter  L_BLOCK_WIDE = 2;
//parameter  H_BLOCK_WIDE = 3;

reg [3:0] L_BLOCK_WIDE;
reg [3:0] H_BLOCK_WIDE;
reg [7:0] L_WIDE;
reg [7:0] H_WIDE;
reg [7:0] l_dis;
reg [7:0] h_dis;
reg [7:0] pix_dis;

reg [7:0] b_color_tg;
reg [7:0] g_color_tg;
reg [7:0] r_color_tg;

     
reg [7:0] b_gray_i1;  //帧测试 输入灰度1
reg [7:0] g_gray_i1;
reg [7:0] r_gray_i1;
reg [7:0] gray_1_cnt;
reg [7:0] b_gray_i2;  //帧测试 输入灰度2
reg [7:0] g_gray_i2;
reg [7:0] r_gray_i2;
reg [7:0] gray_2_cnt;

reg       vs_0;
(*ASYNC_REG = "TRUE"*)reg [3:0] vs_reg;
////////////////spi数据输入//////////////////////
always @(posedge set_clk)
    if(!resetb)begin
            datain_sel      <= 'd0;
            bg_select       <= 'd0;
            tg_select       <= 'd0;
    end
    else if (set_d_ok == 1)
        case(set_addr)

            24'h000000: datain_sel      <= set_data;
            24'h000001: bg_select       <= set_data;
            24'h000002: tg_select       <= set_data;
     

            24'h00000e: light_l1<= set_data;
            24'h00000d: light_l2<= set_data;
            24'h00000c: light_l3<= set_data;
            24'h00000b: light_l4<= set_data;
            24'h00002e: light_l5<= set_data;
            24'h00002d: light_l6<= set_data;
            24'h00002c: light_l7<= set_data;
            24'h00002b: light_l8<= set_data;

            24'h00003b: light_r<= set_data;
            24'h00003c: light_g<= set_data;
            24'h00003d: light_b<= set_data;
            24'h00003f: dataout_sel<= set_data;
            24'h00004f: begin   
                            L_BLOCK_WIDE<= set_data[3:0];          //列框大小*2
                            H_BLOCK_WIDE<= set_data[7:4];          //行框大小*2
                        end
            24'h00004d: L_WIDE<= set_data;                         //分区占像素区间
            24'h00004e: H_WIDE<= set_data;                         //分区占像素区间
            24'h00004b: l_dis<= set_data; 
            24'h00004a: h_dis<= set_data; 
            24'h000049: pix_dis<= set_data; 


            24'h000030: l_zone1 <= set_data[5:0];
            24'h000031: l_zone2 <= set_data[5:0];
            24'h000032: h_zone1 <= set_data[5:0];
            24'h000033: h_zone2 <= set_data[5:0];
            24'h000034: display_s<= set_data;
            24'h000035: light_zone1<= set_data;       //行数据
            24'h000036: light_zone2<= set_data;       //列地址
            24'h000045: light_zone3<= set_data;
            24'h000046: light_zone4<= set_data;
            24'h000047: light_adj_h<= set_data;
            24'h000048: light_adj_l<= set_data;

            24'h000050: b_color_tg<= set_data;  //透过率
            24'h000051: g_color_tg<= set_data;
            24'h000052: r_color_tg<= set_data;
            
            24'h000054: b_gray_i1<= set_data;  //帧测试 输入灰度1
            24'h000055: g_gray_i1<= set_data;
            24'h000056: r_gray_i1<= set_data;
            24'h000057: gray_1_cnt<= set_data;
            
            24'h000058: b_gray_i2<= set_data;  //帧测试 输入灰度2
            24'h000059: g_gray_i2<= set_data;
            24'h00005a: r_gray_i2<= set_data;
            24'h00005b: gray_2_cnt<= set_data;
            
            
        endcase

//**********************************************************************************//
//                                        背光控制                                  //
//**********************************************************************************//

assign O_we    =  we_t1;
assign O_waddr =  waddr_t1; 
assign O_wdata =  wdata_t1;
assign O_we_end = we_end_t1;

always@ (posedge BL_clk or negedge resetb)
   if(!resetb)  
       wdata_t1 <= 1'b0;
   else if(datain_sel==0) 
       if(O_test_dect[0] == 0)
           wdata_t1 <=  I_wdata;
       else begin
          if(I_wdata[15:12] >= 4'h1) 
              wdata_t1 <= 16'hffff;   
          else if (I_wdata < 16'h500)
              wdata_t1 <= 16'h0000;  
       end         
   else begin
       case (bg_select)                      //ab0001 
            8'd0: wdata_t1    <=  I_wdata;
            8'd255: wdata_t1    <=  16'hffff;
            8'd2: begin                                                     //背光单方块A输出
                  if(I_waddr == {light_zone1[5:0],light_zone2[6:0]} )      //35 / 36
                       wdata_t1    <= {light_adj_h,light_adj_l}; 
                  else 
                       wdata_t1    <= 16'h0000;
                  end           
            8'd3: begin                                                        //背光单方块A and B输出
                   if(I_waddr[12:7]  == light_zone1[5:0]  &&  (I_waddr[6:0]== light_zone2 || I_waddr[6:0] == (light_zone2+1)))   
                       wdata_t1    <= {light_adj_h,light_adj_l};
                   else 
                       wdata_t1    <= 16'h0000;
                 end
            8'd4: begin                                                         //背光单方块A and C输出
                   if(I_waddr[12:7]  == light_zone1[5:0]  &&  (I_waddr[6:0]== light_zone2 || I_waddr[6:0] == (light_zone2+2)))     
                       wdata_t1    <= {light_adj_h,light_adj_l};
                   else 
                       wdata_t1    <= 16'h0000;
                 end
            8'd5: begin                                                      //背光4多方块输出                
                  if((I_waddr[12:7] == light_zone1 || I_waddr[12:7] ==(light_zone1+1)) && (I_waddr[6:0]== light_zone2 || I_waddr[6:0] == (light_zone2+1)))    
                       wdata_t1    <= {light_adj_h,light_adj_l}; 
                  else 
                       wdata_t1    <= 16'h0000;
                  end
       
            8'd6:  wdata_t1    <= {light_adj_h,light_adj_l};             //背光指定值输出 

            8'd7: begin
                   if(I_waddr[6:0] < 48) //左全开右动态
                       wdata_t1    <= 16'hffff; 
                   else 
                       wdata_t1    <= I_wdata;
                  end
            8'd8: begin                                                  //10*10 方块全亮
                  if((I_waddr[12:7]  >= light_zone1[5:0] && I_waddr[12:7]  <= light_zone1[5:0]+9) &&  (I_waddr[6:0]>= light_zone2  && I_waddr[6:0] <= (light_zone2+9)))
                       wdata_t1    <= {light_adj_h,light_adj_l};
                   else 
                       wdata_t1    <= 16'h0000;
                  end
            8'd9: begin                                                  //10*10 棋盘格偶亮
                  if((I_waddr[12:7]  >= light_zone1[5:0] && I_waddr[12:7]  <= light_zone1[5:0]+9)  &&  (I_waddr[6:0]>= light_zone2  && I_waddr[6:0] <= (light_zone2+9)))     begin
                      if( (I_waddr[7] == 0 &&  I_waddr[0] == 0) || (I_waddr[7] == 1 &&  I_waddr[0] == 1)) 
                           wdata_t1    <= {light_adj_h,light_adj_l};
                      else 
                           wdata_t1    <= 16'h0000;
                  end
                  else 
                      wdata_t1    <= 16'h0000;
                   end
            8'd10: begin                                                  //10*10 棋盘格奇亮
                   if((I_waddr[12:7]  >= light_zone1[5:0] && I_waddr[12:7]  <= light_zone1[5:0]+9)  &&  (I_waddr[6:0]>= light_zone2  && I_waddr[6:0] <= (light_zone2+9)))     begin
                      if( (I_waddr[7] == 1 &&  I_waddr[0] == 0) || (I_waddr[7] == 0 &&  I_waddr[0] == 1)) 
                           wdata_t1    <= {light_adj_h,light_adj_l};
                      else 
                           wdata_t1    <= 16'h0000;
                   end
                   else 
                       wdata_t1    <= 16'h0000;
                  end
            8'd11: begin                                                         //背光单方块A44亮输出
                   if(I_waddr[12:7]  == (light_zone1[5:0]+4)  &&  I_waddr[6:0] == (light_zone2+4))    
                       wdata_t1    <= {light_adj_h,light_adj_l};
                   else 
                       wdata_t1    <= 16'h0000;
                 end
            8'd12: begin                                                  // 整屏棋盘格偶亮,用于校准分区与PIXEL的位置关系，通过LEDDEBUG打画面测试横线与竖线
                      if( (I_waddr[7] == 0 &&  I_waddr[0] == 0) || (I_waddr[7] == 1 &&  I_waddr[0] == 1)) 
                           wdata_t1    <= {light_adj_h,light_adj_l};
                      else 
                           wdata_t1    <= 16'h0000;
                  end
 
            8'd13: wdata_t1    <= 16'h0000;                                   //背光至黑
            
            8'd14: begin                                                      //背光4*4 间隔6 多方块输出                
                  if((waddr_t1[12:7] == light_zone1 || waddr_t1[12:7] == (light_zone1+6) || waddr_t1[12:7] == (light_zone1+12) || waddr_t1[12:7] ==(light_zone1+18))  && 
                     (waddr_t1[6:0] == light_zone2 || waddr_t1[6:0] == (light_zone2+6) || waddr_t1[6:0] == (light_zone2+12) || waddr_t1[6:0] == (light_zone2+18)))    
                       wdata_t1    <= {light_adj_h,light_adj_l}; 
                  else 
                       wdata_t1    <= 16'h0000;
                  end

            8'd15: begin                                                      //背光4*4 间隔6 多方块输出                
                  if((waddr_t1[12:7] == light_zone1 || waddr_t1[12:7] == (light_zone1+light_zone3) || waddr_t1[12:7] == (light_zone1+2*light_zone3) || waddr_t1[12:7] == (light_zone1+3*light_zone3))  && 
                     (waddr_t1[6:0] == light_zone2 || waddr_t1[6:0] == (light_zone2+light_zone4) || waddr_t1[6:0] == (light_zone2+2*light_zone4) || waddr_t1[6:0] == (light_zone2+3*light_zone4)))    
                       wdata_t1    <= {light_adj_h,light_adj_l}; 
                  else 
                       wdata_t1    <= 16'h0000;
                  end

            8'd16: begin                                                      //背光4*4 间隔6 多方块输出                
                  if((waddr_t1[12:7] == light_zone1   || waddr_t1[12:7] == (light_zone1+light_zone3)   || waddr_t1[12:7] == (light_zone1+2*light_zone3) || waddr_t1[12:7] == (light_zone1+3*light_zone3) ||
                     waddr_t1[12:7] == (light_zone1+4*light_zone3)  || waddr_t1[12:7] == (light_zone1+5*light_zone3) || waddr_t1[12:7] == (light_zone1+6*light_zone3))  && 
                     (waddr_t1[6:0] == light_zone2 || waddr_t1[6:0] == (light_zone2+light_zone4) || waddr_t1[6:0] == (light_zone2+2*light_zone4) || waddr_t1[6:0] == (light_zone2+3*light_zone4) ||
                       waddr_t1[6:0] == (light_zone2+4*light_zone4)|| waddr_t1[6:0] == (light_zone2+5*light_zone4)|| waddr_t1[6:0] == (light_zone2+6*light_zone4) ||
                       waddr_t1[6:0] == (light_zone2+7*light_zone4) || waddr_t1[6:0] == (light_zone2+8*light_zone4) || waddr_t1[6:0] == (light_zone2+9*light_zone4) ||
                        waddr_t1[6:0] == (light_zone2+10*light_zone4) || waddr_t1[6:0] == (light_zone2+11*light_zone4) || waddr_t1[6:0] == (light_zone2+12*light_zone4)))    
                       wdata_t1    <= {light_adj_h,light_adj_l}; 
                  else 
                       wdata_t1    <= 16'h0000;
                  end

                  
             8'd17: begin                                                      //单行亮               
                  if(waddr_t1[12:7] == light_zone1) 
                       wdata_t1   <= {light_adj_h,light_adj_l}; 
                  else
                       wdata_t1    <= 16'h0000;
                  end
             8'd18: begin                                                      //单列亮               
                  if(waddr_t1[6:0] == light_zone2) 
                       wdata_t1    <= {light_adj_h,light_adj_l}; 
                  else 
                       wdata_t1    <= 16'h0000;
                  end

           default: wdata_t1    <= 16'hffff; 
       endcase
   end

always@ (posedge BL_clk )
     waddr_t1 <=  I_waddr;
       
always@ (posedge BL_clk)
     we_t1 <= I_we;

always@ (posedge BL_clk)
     we_end_t1 <= I_we_end;

//**********************************************************************************//
//                                        测试图像判断                              //
//**********************************************************************************//
reg  test_dect_w0,test_dect_b0;
reg  test_dect_w1,test_dect_b1;
reg  test_dect_w2,test_dect_b2;
reg  test_dect_w3,test_dect_b3;
reg  test_dect_w4,test_dect_b4;
reg  test_dect_w5,test_dect_b5;



parameter test_xy0_LTOP= 13'b0101110101001, test_xy0_RDOWN = 13'b0111110110110;     //(41,23),(54,31)
parameter test_xy1_LTOP= 13'b0100100100000, test_xy1_RDOWN = 13'b1001000111111;     //(32,18),(63,36)
parameter test_xy2_LTOP= 13'b0011010011000, test_xy2_RDOWN = 13'b1010011001001;     //(24,13),(72,41)
parameter test_xy3_LTOP= 13'b0011000010101, test_xy3_RDOWN = 13'b1010101001010;     //(21,12),(74,42)
parameter test_xy4_LTOP= 13'b0010000001110, test_xy4_RDOWN = 13'b1011111010001;     //(14, 8),(81,47)

parameter max_white = 16'h2a00;
parameter min_black = 16'h00a0;


wire [5:0] h_block;
wire [6:0] l_block;

assign h_block = I_waddr[12:7];
assign l_block = I_waddr[6:0];

always@ (posedge BL_clk or negedge resetb)
   if(!resetb)  
       vs_reg <= 'b0;
   else 
       vs_reg <= {vs_reg[2:0],vs};      
always@ (posedge BL_clk or negedge resetb)
    if(!resetb)  
        vs_0 <= 'b0;
    else if(vs_reg[3:2] == 2'b01)
        vs_0 <= 1'b1;
    else 
        vs_0 <= 1'b0;
/////////////////test_light 30% ///////////////////


always@ (posedge BL_clk or negedge resetb)
   if(!resetb)  
       test_dect_w3 <= 1'b1;
   else if(vs_0)
       test_dect_w3 <= 1;      
   else if((h_block >= 18 && h_block < 38) && ((l_block >= 33) && (l_block < 63)))  begin
         if (I_wdata <= max_white)
             test_dect_w3 <= 0;
   end

always@ (posedge BL_clk or negedge resetb)
   if(!resetb)  
       test_dect_b3 <= 1'b1;
   else if(vs_0)
       test_dect_b3 <= 1'b1;      
   else if((h_block <=7) || (h_block >= 49) || (((h_block > 18) && (h_block < 33)) && ((l_block <  14) || (l_block > 82)))) begin          
        if (I_wdata >=min_black)
            test_dect_b3 <= 0;
   end

always@ (posedge BL_clk)
   if(vs_0)  
       O_test_dect[0] <= test_dect_w3 && test_dect_b3;

endmodule       
